Well, I have the logic analyzer, but I have no interest in spending the rest of my life attempting to reverse engineer the Legacy remote!
Ah, C'mon GRJ, I figured you were the kind of person who just adored Karnaugh maps *lol*....(funny story, when I was doing my CS degree in the early 80's, in the computer architecture class the person teaching it (likely grad student) spent like 3 days on using Karnaugh maps to reduce the number of gates. I mentioned this to my brother, who is an EE, and he shook his head and said "drop the class, and take it with someone else". Back when logic was defined by things like vacuum tubes and discrete transistors, when the time to process the output was really, really slow (like miliseconds), it made sense. By the 80's, you could buy off the shelf gates with like a thousand AND gates on a chip with a processing time in the microsecond or above range (1/1 millionth of a second) so reducing gates made little sense, lot more expensive to have an engineer waste time reducing the number of gates than simply using whatever worked
(For those who aren't in this world, the basic architecture of computers relies on so called gates, that implement Boolean logic that is pretty much yes/no 1/0 (like an AND gate, with 2 inputs, if both are 1, the output will be 1/on, otherwise it is zero). There is a field of math called Boolean algebra that lets you create logic using the various types of logic (which in turn are the gates I talked about). The Karnaugh map was a methodology where it would reduce the final Boolean "formula" to use a reduced number of steps. Reducing number of steps in Boolean algebra= less gates used which as I mentioned above, is faster, but not worth it with cheap, really fast gates. An ASIC is the summation of the logic that drives a legacy controller with instructions coded in firmware).